- Integer-N PLL
- Frac-N PLL
- Low Noise Frequency Synthesis
- Data Conversion
- CMOS Micropower (5nA BGAP/PTAT, nA Power Conversion)
- Low Noise VCOs
- Trans-impedance Amplifiers for Opto-electronic Receivers
- Clock and Data Recovery
- SerDes Data Aggregator
- Wide Bandwidth Sample and Hold
- Power Supply / Voltage Regulation
- Micropower CMOS BandGap; PTAT; Voltage Conversion
- I2C
- Digital PLL
- Time Domain Reflectometer
- FPGA and/or Verilog-A Architecture Proof of concept
- Up to 60 Gbaud PAM4